This invention relates to the fabrication of integrated circuits and, more particularly, to plasma processing equipment for semiconductor wafers.
Integrated circuits are typically made using semiconductor wafers such as silicon wafers. Semiconductor wafers are processed into integrated circuits by forming transistors and other circuit elements on the wafer surface with a sequence of process steps.
A commonly used semiconductor manufacturing process is chemical vapor deposition (CVD) in which a film of a dielectric or conductive material is deposited upon the surface of a semiconductor wafer. Another commonly used process is a plasma or reactive ion etch, in which layers of material are etched away from exposed surface areas of the wafer. A common plasma etchant is formed from the mixture of CF.sub.4 and O.sub.2.
A prior art plasma processing system 10 is illustrated in FIG. 1. A process gas enters a fluid distribution head 12 (sometimes called a "showerhead") through a fluid inlet pipe 14. The process gas flows into a manifold or chamber 18 of the head 12 and exits through a number of apertures 20 in a planar dispersion plate 22. A semiconductor wafer 24 is typically held by a ring clamp 26 against a top surface 29 of a pedestal 28. The top surface 29 is often domed having a spherical radius Rp of about fifteen feet to maintain good physical contact with wafer 28, which tends to bend when it is clamped and heated by the plasma reaction. A radio frequency (RF) generator 32 is coupled between the plate 22 and the pedestal 28. The RF generator 32 forms a plasma 25 from the process gasses between the plate 22 (which serves as an anode) and the pedestal 28 (which serves as a cathode). Positive ions in the plasma 25 are accelerated towards the pedestal 28 to deposit upon or etch the surface of the wafer 24.
As mentioned previously, the semiconductor wafer 24 bends or deforms due to its clamping to the pedestal and due to the heat generated during plasma processing. Because non-uniform temperatures cause non-uniformities in processing, the pedestal 28 is preferably domed to maintain a uniform thermal contact with the semiconductor wafer 24. While this method helps the problem of maintaining uniform temperatures on all portions of the semiconductor wafer 24, it is found through experimentation that the different distances between portions of the curved semiconductor wafer 24 and the prior art planar dispersion plate 22 are responsible for other non-uniformities. These non-uniformities tend to be concentric in nature due to the geometries involved.
Because of the small feature sizes of modern integrated circuits, the uniform deposition or removal of materials over the surface of a wafer is crucial to the quality and yield of the finished product. Process parameters such as power, pressure, gas flow, or distance of the distribution head from the pedestal are often adjusted in an attempt to improved process uniformity. Such adjustments are typically made on an empirical basis when the process uniformity has been determined to be substandard, and are time consuming and uncertain. It is therefore desirable to make structural improvements to plasma processing systems which improve process uniformity without resorting to the adjustment of process parameters.